1. Field of the Invention
This invention relates to the manufacture of integrated circuits and more specifically to the functional verification of a microprocessor.
2. Description of the Relevant Art
Today's microprocessor market is characterized by a number of manufacturers competing to supply the needs of customers demanding higher performance products. In this environment, a microprocessor manufacturer stands to profit most by being the first to introduce a new product which is superior to products offered by competitors. The ability to be first to market with a superior product requires shortening the microprocessor product development cycle as much as possible.
Before the first working prototype of a new microprocessor is manufactured, a functional model of the new microprocessor is tested extensively to ensure the new design meets a set of functional specifications. Due to the increasing complexity of modern microprocessors, a substantial amount of time is spent during product development in verifying that the functional model of the new microprocessor operates correctly. Thus the product development cycle may be shortened significantly by improving the efficiency of the functional verification process.
A microprocessor must be able to correctly execute instructions of a computer program while responding to one or more control signals. Such control signals include, for example, interrupt signals and bus arbitration signals. As used herein, the term "interrupt" refers to a control signal which indicates a high-priority request for service from a device operably coupled to the microprocessor. For example, a peripheral device which is ready to transmit data to or receive data from the microprocessor may assert an interrupt signal. Originating from outside the microprocessor, an interrupt is ordinarily not synchronized with a system clock signal which orchestrates the internal activities of the microprocessor.
Bus arbitration signals are used to control access to a common bus when signal lines of the microprocessor and at least one other device capable of bus control (i.e., at least one other bus master) are coupled to the common bus. A bus master receiving an input bus arbitration signal stops driving some or all of the signal lines coupled to the bus in order to allow another bus master to control the corresponding signal lines of the bus.
A microprocessor is typically coupled to one or more external memory units which store sets of instructions and data (i.e., computer programs). An application program is a computer program which performs a specific function and is designed to operate within a controlled environment provided by an operating system. An operating system is a collection of computer programs which provide file management and input/output control functions. MS-DOS.RTM. and Windows NT.TM. (Microsoft Corp.) are common operating systems.
The two general categories of types of interrupts are "non-maskable" and "maskable". A single non-maskable interrupt (NMI) signal line of the microprocessor is typically reserved for informing the microprocessor that a catastrophic event has occurred or is about to occur. Examples of non-maskable interrupts include bus parity error, failure of a critical hardware component such as a timer, and imminent loss of electrical power. Maskable interrupts are lower-priority requests for service which will not result in catastrophic events if not honored immediately. Maskable interrupts may be ignored by the microprocessor under program control. A request for service Gofrom a peripheral device which is ready to transmit data to or receive data from the microprocessor is an example of a maskable interrupt. A programmable interrupt controller (PIC) typically receives maskable interrupt requests from devices coupled to the microprocessor, prioritizes the interrupt requests, and activates a single maskable interrupt (IRQ) signal line of the microprocessor as required.
A section of the lowermost portion of the physical address space of a microprocessor is typically dedicated to operating system functions. During microprocessor initialization, a typical operating system loads an interrupt vector table into the lowermost 1,024 (1 k) bytes of an external memory unit starting at memory location 0000.sub.-- 0000h. The interrupt vector table contains the starting addresses of interrupt service routines. The interrupt service routines are themselves computer programs, and are typically stored in the lowermost portion of the external memory unit along with the interrupt vector table.
When a microprocessor receives an interrupt, application program execution stops, the contents of certain critical registers are saved (i.e., the internal state of the microprocessor is saved), and internal control is transferred to an interrupt service routine (i.e., an interrupt handler) which corresponds to the type of interrupt received. In the case of a maskable interrupt, the PIC typically identifies the interrupt to be serviced (i.e., provides a number assigned to the interrupt) during an interrupt acknowledge operation. A non-maskable interrupt is typically assigned a specific interrupt number, and no interrupt acknowledge operation takes place. The microprocessor uses the interrupt number as an index into the interrupt vector table to obtain the address of the appropriate interrupt service routine. When the interrupt service routine is completed, the saved contents of the critical registers are restored (i.e., the state of the microprocessor is restored), and the microprocessor resumes application program execution at the point where execution was interrupted.
Other than the time required to accomplish an interrupt service routine, or to relinquish and regain control of signal lines coupled to a common bus as a result of bus arbitration, the handling of an interrupt signal or a bus arbitration signal should not affect application program execution. It is possible, however, for an error in the design of the microprocessor, or a defect introduced into the microprocessor during manufacturing, to cause the microprocessor to produce an incorrect result when responding to a control signal during a given microprocessor activity. A complete verification of the operation of a microprocessor must thus involve ensuring the microprocessor produces correct results during all microprocessor activities, and when control signals (e.g., interrupt or bus arbitration signals) are received by the microprocessor during performance of the microprocessor activities.
Due to a lack of software tools, evaluation of a microprocessor's ability to correctly respond to control signals has typically been delayed until after the fabrication of one or more working prototypes. It would be desirable, however, to have a software tool which would allow testing of the functional model of a microprocessor to determine the microprocessor's ability to correctly respond to control signals before the manufacture of a working prototype. Such a tool would allow earlier detection and correction of design errors, potentially shortening the development cycle of a new microprocessor product.